EP2C20F256C8N Datasheet, PDF (299/470 Pages) Altera Corporation – Cyclone II Device Handbook, Volume 1

Selectable I/O Standards in Cyclone II Devices
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transistor-to-transistor logic (TTL), and positive (or pseudo) emitter
coupled logic (PECL). This low EMI makes LVDS ideal for applications
with low EMI requirements or noise immunity requirements. The LVDS
standard does not require an input reference voltage. However, it does
require a termination resistor of 90 to 110 Ωbetween the two signals at the
input buffer. Cyclone II devices support true differential LVDS inputs and
outputs.
LVDS outputs on Cyclone II need external resistor network to work
properly. Refer to the High Speed Differential Interfaces in Cyclone II Devices
chapter in volume 1 of the Cyclone II Device Handbook for more
information.
For reduced swing differential signaling (RSDS), V_OD ranges from 100 to
600 mV. For mini-LVDS, V_OD ranges from 300 to 600 mV. The differential
termination resistor value ranges from 95 to 105 Ω for both RSDS and
mini-LVDS. Cyclone II devices support RSDS/mini-LVDS outputs only.
Differential LVPECL
The low voltage positive (or pseudo) emitter coupled logic (LVPECL)
standard is a differential interface standard recommending V_CCIO of
3.3 V. The LVPECL standard also supports V_CCIO of 2.5 V, 1.8 V and 1.5 V.
The standard is used in applications involving video graphics,
telecommunications, data communications, and clock distribution. The
high-speed, low-voltage swing LVPECL I/O standard uses a positive
power supply and is similar to LVDS. However, LVPECL has a larger
differential output voltage swing than LVDS. The LVPECL standard does
not require an input reference voltage, but it does require an external
100-Ω termination resistor between the two signals at the input buffer.
Figures 10–17 and 10–18 show two alternate termination schemes for
LVPECL. LVPECL input standard is supported at the clock input pins on
Cyclone II devices. LVPECL output standard is not supported.
Figure 10–17. LVPECL DC Coupled Termination
Output Buffer
Z = 50 Ω
Input Buffer
100 Ω
Z = 50 Ω
Altera Corporation
February 2008
10–17
Cyclone II Device Handbook, Volume 1