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EP2C20F256C8N Datasheet, PDF (116/470 Pages) Altera Corporation – Cyclone II Device Handbook, Volume 1
DC Characteristics for Different Pin Types
Table 5–11 specifies the bus hold parameters for general I/O pins.
Table 5–11. Bus Hold Parameters Note (1)
Parameter
Conditions
1.8 V
VCCIO Level
2.5 V
3.3 V
Unit
Bus-hold low, sustaining
current
Bus-hold high, sustaining
current
Bus-hold low, overdrive
current
Bus-hold high, overdrive
current
Bus-hold trip point (2)
Min Max Min Max Min Max
VI N >
VI L(maximum)
30
—
50
—
70
—
μA
VI N <
VI L(minimum)
–30
—
–50
—
–70
—
μA
0 V < VI N < VC C I O
—
200
—
300
—
500 μA
0 V < VI N < VC C I O
—
–200
—
–300
—
–500 μA
—
0.68 1.07 0.7
1.7
0.8
2.0
V
Notes to Table 5–11:
(1) There is no specification for bus-hold at VCCIO = 1.5 V for the HSTL I/O standard.
(2) The bus-hold trip points are based on calculated input voltages from the JEDEC standard.
On-Chip Termination Specifications
Table 5–12 defines the specifications for internal termination resistance
tolerance when using series or differential on-chip termination.
Table 5–12. Series On-Chip Termination Specifications
Resistance Tolerance
Symbol
Description
Conditions
Commercial
Max
Industrial
Max
Extended/
Automotive
Temp Max
Unit
25-Ω RS Internal series termination without VC C I O = 3.3V
±30
±30
calibration (25-Ω setting)
50-Ω RS Internal series termination without VC C I O = 2.5V
±30
±30
calibration (50-Ω setting)
50-Ω RS Internal series termination without VC C I O = 1.8V
±30 (1)
±40
calibration (50-Ω setting)
±40
%
±40
%
±50
%
Note to Table 5–12:
(1) For commercial –8 devices, the tolerance is ±40%.
5–12
Cyclone II Device Handbook, Volume 1
Altera Corporation
February 2008