EP2C20F256C8N Datasheet, PDF (232/470 Pages) Altera Corporation – Cyclone II Device Handbook, Volume 1

Memory Modes
■ 4K × 1
■ 2K × 2
■ 1K × 4
■ 512 × 8
■ 512 × 9
■ 256 × 16
■ 256 × 18
■ 128 × 32
■ 128 × 36
Figure 8–7 shows timing waveforms for read and write operations in
single-port mode.
Figure 8–7. Cyclone II Single-Port Timing Waveforms
inclock
wren
address
data (1)
q (synch)
q (asynch)
an-1
an
din-1
din
din-2
din-1
a0
din-1
din
a1
din
dout0
a2
dout0
dout1
a3
dout1
dout2
a4
a5
a6
din4
din5
din6
dout2
dout3
dout3
din4
din4
din5
Note to Figure 8–7:
(1) The crosses in the data waveform during read mean “don’t care.”
Simple Dual-Port Mode
Simple dual-port mode supports simultaneous read and write operation.
Figure 8–8 shows the simple dual-port memory configuration.
8–10
Cyclone II Device Handbook, Volume 1
Altera Corporation
February 2008