English
Language : 

Z8F0113HJ005EG Datasheet, PDF (93/245 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers
Z8 Encore! XP® F0823 Series
Product Specification
78
PWM Output High Time Ratio (%) = R----e---l--o---a---d----V----a---l-u---e-----–----P---W------M------V---a---l--u---e-  100
Reload Value
If TPOL is set to 1, the ratio of the PWM output High time to the total period is represented
by:
PWM Output High Time Ratio (%) = ---P----W-----M-------V----a---l--u---e----  100
Reload Value
CAPTURE Mode
In CAPTURE Mode, the current timer count value is recorded when the appropriate exter-
nal Timer Input transition occurs. The capture count value is written to the Timer PWM
High and Low Byte registers. The timer input is the system clock. The TPOL bit in the
Timer Control Register determines if the capture occurs on a rising edge or a falling edge
of the Timer Input signal. When the capture event occurs, an interrupt is generated and the
timer continues counting. The INPCAP bit in TxCTL1 Register is set to indicate the timer
interrupt is because of an input capture event.
The timer continues counting up to the 16-bit reload value stored in the Timer Reload
High and Low Byte registers. Upon reaching the reload value, the timer generates an inter-
rupt and continues counting. The INPCAP bit in TxCTL1 Register clears indicating the
timer interrupt is not because of an input capture event.
Observe the following steps to configure a timer for CAPTURE Mode and initiating the
count:
1. Write to the Timer Control Register to:
– Disable the timer
– Configure the timer for CAPTURE Mode
– Set the prescale value
– Set the capture edge (rising or falling) for the Timer Input
2. Write to the Timer High and Low Byte registers to set the starting count value (typi-
cally 0001H).
3. Write to the Timer Reload High and Low Byte registers to set the reload value.
4. Clear the Timer PWM High and Low Byte registers to 0000H. Clearing these registers
allows the software to determine if interrupts were generated by either a capture or a
reload event. If the PWM High and Low Byte registers still contain 0000H after the
interrupt, the interrupt was generated by a reload.
5. Enable the timer interrupt, if appropriate, and set the timer interrupt priority by writing
to the relevant interrupt registers. By default, the timer interrupt is generated for both
PS024315-1011
PRELIMINARY
Operation