Z8F0113HJ005EG Datasheet, PDF (199/245 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F0823 Series
Product Specification
184
Table 118. eZ8 CPU Instruction Summary (Continued)
Assembly
Mnemonic
Symbolic Operation
Address
Mode
dst src
BTJNZ bit, src, if src[bit] = 1
r
dst
PC ← PC + X
Ir
BTJZ bit, src, if src[bit] = 0
r
dst
PC ← PC + X
Ir
CALL dst
SP ← SP –2
IRR
@SP ← PC
PC ← dst
DA
CCF
C ← ~C
CLR dst
dst ← 00H
R
IR
COM dst
dst ← ~dst
R
IR
CP dst, src
dst - src
r
r
r
Ir
R
R
R IR
R IM
IR IM
CPC dst, src dst - src - C
r
r
r
Ir
R
R
R IR
R IM
IR IM
CPCX dst, src dst - src - C
ER ER
ER IM
CPX dst, src dst - src
ER ER
ER IM
Note: Flags Notation:
* = Value is a function of the result of the operation.
– = Unaffected.
X = Undefined.
0 = Reset to 0.
1 = Set to 1.
Opcode(s)
Flags
Fetch Instr.
(Hex) C Z S V D H Cycles Cycles
F6
–––––– 3
3
F7
3
4
F6
–––––– 3
3
F7
3
4
D4
–––––– 2
6
D6
3
3
EF
* – – – – –- 1
2
B0
–––––– 2
2
B1
2
3
60
–* *0–– 2
2
61
2
3
A2
* * * *–– 2
3
A3
2
4
A4
3
3
A5
3
4
A6
3
3
A7
3
4
1F A2 * * * * – – 3
3
1F A3
3
4
1F A4
4
3
1F A5
4
4
1F A6
4
3
1F A7
4
4
1F A8 * * * * – – 5
3
1F A9
5
3
A8
* * * *–– 4
3
A9
4
3
PS024315-1011
PRELIMINARY
eZ8 CPU Instruction Summary