Z8F0113HJ005EG Datasheet, PDF (55/245 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F0823 Series
Product Specification
40
PC[2:0]. All other signal pins are 5 V-tolerant, and can safely handle inputs higher than
V_DD even with the pull-ups enabled.
External Clock Setup
For systems using an external TTL drive, PB3 is the clock source for 20- and 28-pin
devices. In this case, configure PB3 for alternate function CLKIN. Write the Oscillator
Control Register (see the Oscillator Control Register Definitions section on page 171)
such that the external oscillator is selected as the system clock. For 8-pin devices, use PA1
instead of PB3.
GPIO Interrupts
Many of the GPIO port pins are used as interrupt sources. Some port pins are configured
to generate an interrupt request on either the rising edge or falling edge of the pin input
signal. Other port pin interrupt sources generate an interrupt when any edge occurs (both
rising and falling). For more information about interrupts using the GPIO pins, see the
Interrupt Controller chapter on page 54.
GPIO Control Register Definitions
Four registers for each port provide access to GPIO control, input data, and output data.
Table 18 lists these port registers. Use the Port A–D Address and Control registers
together to provide access to subregisters for port configuration and control.
Table 18. GPIO Port Registers and Subregisters
Port Register
Mnemonic
PxADDR
PxCTL
PxIN
PxOUT
Port Subregister
Mnemonic
PxDD
PxAF
PxOC
Port Register Name
Port A–C Address Register (Selects subregisters).
Port A–C Control Register (Provides access to subregisters).
Port A–C Input Data Register.
Port A–C Output Data Register.
Port Register Name
Data Direction.
Alternate Function.
Output Control (Open-Drain).
PS024315-1011
PRELIMINARY
External Clock Setup