Z8F0113HJ005EG Datasheet, PDF (142/245 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F0823 Series
Product Specification
127
Table 74. ADC Control Register 0 (ADCCTL0)
Bit
7
6
5
4
3
2
1
0
Field
CEN REFSELL REFEXT CONT
ANAIN[3:0]
RESET
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
F70H
Bit
[7]
CEN
[6]
REFSELL
[5]
REFEXT
[4]
CONT
Description
Conversion Enable
0 = Conversion is complete. Writing a 0 produces no effect. The ADC automatically clears
this bit to 0 when a conversion is complete.
1 = Begin conversion. Writing a 1 to this bit starts a conversion. If a conversion is already in
progress, the conversion restarts. This bit remains 1 until the conversion is complete.
Voltage Reference Level Select Low Bit
In conjunction with the High bit (REFSELH) in ADC Control/Status Register 1, this deter-
mines the level of the internal voltage reference; the following details the effects of {REF-
SELH, REFSELL}. This reference is independent of the Comparator reference.
00 = Internal Reference Disabled, reference comes from external pin.
01 = Internal Reference set to 1.0 V.
10 = Internal Reference set to 2.0 V (default).
External Reference Select
0 = External reference buffer is disabled; V_REF pin is available for GPIO functions.
1 = The internal ADC reference is buffered and connected to the V_REF pin.
Continuous Conversion
0 = Single-shot conversion. ADC data is output once at completion of the 5129 system clock
cycles.
1 = Continuous conversion. ADC data updated every 256 system clock cycles.
PS024315-1011
PRELIMINARY
ADC Control Register Definitions