Z8F0113HJ005EG Datasheet, PDF (131/245 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F0823 Series
Product Specification
116
The UART data rate is calculated using the following equation:
UART Baud Rate (bits/s)
=
--------^S---^y---^s--^t--^e--^m------^C----^l-^o---^c--^k----^F---^r--^e--^q---^u---^e---ⁿ---^c--^y----⁽--^H---^z---⁾-------
16  UART Baud Rate Divisor Value
For a given UART data rate, calculate the integer baud rate divisor value using the follow-
ing equation:
UART Baud Rate Divisor Value (BRG) = Round_^S-₁---_6y--^s--_-^t-^e---_Um---_A---^C-_R--^l-_To---^c--_D-^k--_a-^F--_t-_a-^r-^e---_Rq---^ua---^et-_e-ⁿ---^c-₍-_b-^y--_i-_t(-_s-^H--_/-_s-^z--_{))}
The baud rate error relative to the acceptable baud rate is calculated using the following
equation:
UART Baud Rate Error (%)
=
100



-^A---^c--^t--^u---^a--^l---^D---^a---^tD--^a--_e--^R-_s--_ia-_r--_et--^e-_d---^–-_D---^D-_a--_t-^e-_a--^s--_Ri-^r--^e-_a--^dt--_e--^D----^a--^t--^a----^R---^a---^t--^e-_
For reliable communication, the UART baud rate error must never exceed five percent.
Table 73 provides information about data rate errors for a 5.5296 MHz System Clock.
Table 73. UART Baud Rates
Acceptable Rate
(kHz)
1250.0
625.0
250.0
115.2
57.6
38.4
19.2
9.60
4.80
2.40
1.20
0.60
0.30
5.5296 MHz System Clock
BRG Divisor
(Decimal)
Actual Rate
(kHz)
N/A
N/A
N/A
N/A
1
345.6
3
115.2
6
57.6
9
38.4
18
19.2
36
9.60
72
4.80
144
2.40
288
1.20
576
0.60
1152
0.30
Error (%)
N/A
N/A
38.24
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
PS024315-1011
PRELIMINARY
UART Control Register Definitions