Z8F0113HJ005EG Datasheet, PDF (174/245 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F0823 Series
Product Specification
159
• If the PA2/RESET pin is held Low while a 32-bit key sequence is issued to the PA0/
DBG pin, the DBG feature is unlocked. After releasing PA2/RESET, it is pulled high.
At this point, the PA0/DBG pin can be used to autobaud and cause the device to enter 
DEBUG Mode. For more details, see the OCD Unlock Sequence (8-Pin Devices Only)
section on page 161.
Exiting DEBUG Mode
The device exits DEBUG Mode following any of these operations:
• Clearing the DBGMODE bit in the OCD Control Register to 0
• Power-On Reset
• Voltage Brown-Out reset
• Watchdog Timer reset
• Asserting the RESET pin Low to initiate a Reset
• Driving the DBG pin Low while the device is in STOP Mode initiates a system reset
OCD Data Format
The OCD interface uses the asynchronous data format defined for RS-232. Each character
is transmitted as 1 Start bit, 8 data bits (least-significant bit first), and 1 Stop bit as dis-
played in Figure 25.
START
D0
D1
D2
D3
D4
D5
D6
D7 STOP
Figure 25. OCD Data Format
Note: When responding to a request for data, the OCD may commence transmitting immediately
after receiving the stop bit of an incoming frame. Therefore, when sending the stop bit, the
host must not actively drive the DBG pin High for more than 0.5 bit times. Zilog recom-
mends that, if possible, the host drives the DBG pin using an open-drain output.
OCD Autobaud Detector/Generator
To run over a range of baud rates (data bits per second) with various system clock frequen-
cies, the OCD contains an auto-baud detector/generator. After a reset, the OCD is idle
until it receives data. The OCD requires that the first character sent from the host is the
character 80H. The character 80H has eight continuous bits Low (one Start bit plus 7 data
PS024315-1011
PRELIMINARY
Operation