Z8F0113HJ005EG Datasheet, PDF (163/245 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F0823 Series
Product Specification
148
These serial numbers are stored in the Flash information page (for more details, see the
Reading the Flash Information Page section on page 148 and the Serialization Data sec-
tion on page 154) and are unaffected by mass erasure of the device’s Flash memory.
Randomized Lot Identification Bits
As an optional feature, Zilog is able to provide a factory-programmed random lot identi-
fier. With this feature, all devices in a given production lot are programmed with the same
random number. This random number is uniquely regenerated for each successive produc-
tion lot and is not likely to be repeated.
The randomized lot identifier is a 32-byte binary value, stored in the flash information
page (for more details, see the Reading the Flash Information Page section on page 148
and the Randomized Lot Identifier section on page 154) and is unaffected by mass erasure
of the device’s flash memory.
Reading the Flash Information Page
The following code example shows how to read data from the Flash Information Area.

; get value at info address 60 (FE60h)
ldx FPS, #%80 ; enable access to flash info page
ld R0, #%FE
ld R1, #%60
ldc R2, @RR0 ; R2 now contains the calibration value
Flash Option Bit Control Register Definitions
This section briefly describes the features of the Trim Bit Address and Data registers.
Trim Bit Address Register
The Trim Bit Address (TRMADR) Register contains the target address for an access to the
trim option bits.
Table 87. Trim Bit Address Register (TRMADR)
Bit
7
6
5
4
3
2
1
0
Field
TRMADR: Trim Bit Address (00H to 1FH)
RESET
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
FF6H
PS024315-1011
PRELIMINARY
Flash Option Bit Control Register