Z8F0113HJ005EG Datasheet, PDF (204/245 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F0823 Series
Product Specification
189
Table 118. eZ8 CPU Instruction Summary (Continued)
Assembly
Mnemonic
SBC dst, src
SBCX dst, src
SCF
SRA dst
Symbolic Operation
dst  dst – src - C
dst  dst – src - C
C1
D7 D6 D5 D4 D3 D2 D1 D0
C
dst
Address
Mode
dst src
r
r
r
Ir
R
R
R IR
R IM
IR IM
ER ER
ER IM
R
IR
Opcode(s)
Flags
Fetch Instr.
(Hex) C Z S V D H Cycles Cycles
32
****1* 2
3
33
2
4
34
3
3
35
3
4
36
3
3
37
3
4
38
****1* 4
3
39
4
3
DF 1 – – – – – 1
2
D0
* * *0–– 2
2
D1
2
3
SRL dst
0
D7 D6 D5 D4 D3 D2 D1 D0
C
R
dst
IR
1F C0 * * 0 * – – 3
2
1F C1
3
3
SRP src
RP  src
IM
01
–––––– 2
2
STOP
STOP Mode
6F
–––––– 1
2
SUB dst, src dst  dst – src
r
r
22
****1* 2
3
r
Ir
23
2
4
R
R
24
3
3
R IR
25
3
4
R IM
26
3
3
IR IM
27
3
4
SUBX dst, src dst  dst – src
ER ER
28
****1* 4
3
ER IM
29
4
3
SWAP dst
dst[7:4]  dst[3:0]
R
F0
X* *X–– 2
2
IR
F1
2
3
Note: Flags Notation:
* = Value is a function of the result of the operation.
– = Unaffected.
X = Undefined.
0 = Reset to 0.
1 = Set to 1.
PS024315-1011
PRELIMINARY
eZ8 CPU Instruction Summary