Z8F0113HJ005EG Datasheet, PDF (150/245 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F0823 Series
Product Specification
135
Figure 20. Flash Memory Arrangement
Flash Information Area
The Flash information area is separate from program memory and is mapped to the
address range FE00H to FFFFH. Not all these addresses are accessible. Factory trim values
for the analog peripherals are stored here. Factory calibration data for the ADC is also
stored here.
Operation
The Flash Controller programs and erases Flash memory. The Flash Controller provides
the proper Flash controls and timing for Byte Programming, Page Erase, and Mass Erase
of Flash memory.
The Flash Controller contains several protection mechanisms to prevent accidental program-
ming or erasure. These mechanism operate on the page, sector and full-memory levels.
Figure 21 displays a basic Flash Controller flow. The following subsections provide
details about the various operations (Lock, Unlock, Byte Programming, Page Protect,
Page Unprotect, Page Select Page Erase, and Mass Erase) displayed in Figure 21.
PS024315-1011
PRELIMINARY
Flash Information Area