Z8F0113HJ005EG Datasheet, PDF (113/245 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F0823 Series
Product Specification
98
RXD
Parity Checker
Receive Shifter
Receiver Control
with Address Compare
Receive Data
Register
System Bus
Control Registers
Transmit Data
Register
Status Register
Baud Rate
Generator
TXD
CTS
DE
Transmit Shift
Register
Parity Generator
Transmitter Control
Figure 10. UART Block Diagram
Operation
The UART always transmits and receives data in an 8-bit data format, least-significant bit
(lsb) first. An even or odd parity bit can be added to the data stream. Each character begins
with an active Low Start bit and ends with either 1 or 2 active High Stop bits. Figure 11
and Figure 12 display the asynchronous data format employed by the UART without par-
ity and with parity, respectively.
PS024315-1011
PRELIMINARY
Operation