Z8F0113HJ005EG Datasheet, PDF (56/245 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F0823 Series
Product Specification
41
Table 18. GPIO Port Registers and Subregisters (Continued)
Port Register
Mnemonic
PxHDE
PxSMRE
PxPUE
PxAFS1
PxAFS2
Port Register Name
High Drive Enable.
Stop Mode Recovery Source Enable.
Pull-up Enable.
Alternate Function Set 1.
Alternate Function Set 2.
Port A–C Address Registers
The Port A–C Address registers select the GPIO port functionality accessible through the
Port A–C Control registers. The Port A–C Address and Control registers combine to pro-
vide access to all GPIO port controls (Table 19).
Table 19. Port A–C GPIO Address Registers (PxADDR)
Bit
7
6
5
4
3
2
1
0
Field
PADDR[7:0]
RESET
00H
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
FD0H, FD4H, FD8H
Bit
[7:0]
PADDR
Description
Port Address
The Port Address selects one of the subregisters accessible through the Port Control Register.
See Table 20 for each subregister function.
Table 20. PADDR[7:0] Subregister Functions
PADDR[7:0] Port Control Subregister Accessible Using the Port A–C Control Registers
00H
No function. Provides some protection against accidental Port reconfiguration.
01H
Data Direction.
02H
Alternate Function.
03H
Output Control (Open-Drain).
04H
High Drive Enable.
PS024315-1011
PRELIMINARY
GPIO Control Register Definitions