Z8F0113HJ005EG Datasheet, PDF (129/245 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F0823 Series
Product Specification
114
Bit
[2]
BRGCTL
[1]
RDAIRQ
[0]
IREN
Description (Continued)
Baud Rate Control
This bit causes an alternate UART behavior depending on the value of the REN bit in the
UART Control 0 Register.
When the UART receiver is not enabled (REN=0), this bit determines whether the Baud
Rate Generator issues interrupts.
0 = Reads from the Baud Rate High and Low Byte registers return the BRG Reload Value.
1 = The Baud Rate Generator generates a receive interrupt when it counts down to 0.
Reads from the Baud Rate High and Low Byte registers return the current BRG count value.
When the UART receiver is enabled (REN=1), this bit allows reads from the Baud Rate Reg-
isters to return the BRG count value instead of the Reload Value.
0 = Reads from the Baud Rate High and Low Byte registers return the BRG Reload Value.
1 = Reads from the Baud Rate High and Low Byte registers return the current BRG count
value. Unlike the Timers, there is no mechanism to latch the Low Byte when the High
Byte is read.
Receive Data Interrupt Enable
0 = Received data and receiver errors generates an interrupt request to the Interrupt Con-
troller.
1 = Received data does not generate an interrupt request to the Interrupt Controller. Only
receiver errors generate an interrupt request.
Infrared Encoder/Decoder Enable
0 = Infrared encoder/decoder is disabled. UART operates normally.
1 = Infrared encoder/decoder is enabled. The UART transmits and receives data through
the infrared encoder/decoder.
PS024315-1011
PRELIMINARY
UART Control Register Definitions