Z8F0113HJ005EG Datasheet, PDF (220/245 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F0823 Series
Product Specification
205
available to the eZ8 CPU on the second rising clock edge following the change of the port
value.
TCLK
System
Clock
Port Pin
Input Value
Port Value
Changes to 0
Port Input Data
Register Latch
Port Input Data
Read on Data Bus
0 Latched
Into Port Input
Data Register
Port Input Data Register
Value 0 Read
by eZ8
Figure 29. Port Input Sample Timing
Table 130. GPIO Port Input Timing
Parameter
T_{S_PORT}
T_{H_PORT}
T_SMR
Abbreviation
Port Input Transition to X_IN Rise Setup Time (Not pictured)
X_IN Rise to Port Input Transition Hold Time (Not pictured)
GPIO Port Pin Pulse Width to ensure Stop Mode Recovery (for
GPIO Port Pins enabled as SMR sources)
Delay (ns)
Minimum Maximum
5
–
0
–
1 s
PS024315-1011
P R E L I M I N A R Y On-Chip Peripheral AC and DC Electrical