Z8F0113HJ005EG Datasheet, PDF (25/245 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F0823 Series
Product Specification
10
Table 3. Signal Descriptions (Continued)
Signal Mnemonic I/O Description
COUT
O Comparator Output. This is the output of the comparator.
Analog
ANA[7:0]
VREF
I Analog port. These signals are used as inputs to the ADC. The ANA0,
ANA1, and ANA2 pins can also access the inputs and output of the inte-
grated transimpedance amplifier.
I/O Analog-to-Digital Converter reference voltage input.
Clock Input
CLKIN
I Clock Input Signal. This pin can be used to input a TTL-level signal to be
used as the system clock.
LED Drivers
LED
O Direct LED drive capability. All port C pins have the capability to drive an
LED without any other external components. These pins have programma-
ble drive strengths set by the GPIO block.
On-Chip Debugger
DBG
I/O
Debug. This signal is the control and data input and output to and from the
OCD.
Caution: The DBG pin is open-drain and requires an external pull-up
resistor to ensure proper operation.
Reset
RESET
I/O RESET. Generates a reset when asserted (driven Low). Also serves as a
reset indicator; the Z8 Encore! XP forces this pin Low when in reset. This
pin is open-drain and features an enabled internal pull-up resistor.
Power Supply
V_DD
AV_DD2
I Digital Power Supply.
I Analog Power Supply.
V_SS
I Digital Ground.
AV_SS
I Analog Ground.
Notes:
1. PB6 and PB7 are only available in 28-pin packages without ADC. In 28-pin packages with ADC, they are
replaced by AV_DD and AV_SS.
2. The AV_DD and AV_SS signals are available only in 28-pin packages with ADC. They are replaced by PB6 and
PB7 on 28-pin packages without ADC.
PS024315-1011
PRELIMINARY
Signal Descriptions