Z8F0113HJ005EG Datasheet, PDF (176/245 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F0823 Series
Product Specification
161
OCD Unlock Sequence (8-Pin Devices Only)
Because of pin-sharing on the 8-pin device, an unlock sequence must be performed to
access the DBG pin. If this sequence is not completed during a system reset, then the PA0/
DBG pin functions only as a GPIO pin.
The following sequence unlocks the DBG pin:
1. Hold PA2/RESET Low.
2. Wait 5 ms for the internal reset sequence to complete.
3. Send the following bytes serially to the debug pin:
DBG ← 80H (autobaud)
DBG ← EBH
DBG ←5AH
DBG ←70H
DBG ←CDH (32-bit unlock key)
4. Release PA2/RESET. The PA0/DBG pin is now identical in function to that of the
DBG pin on the 20- or 28-pin device. To enter DEBUG Mode, reautobaud and write
80H to the OCD Control Register (see the On-Chip Debugger Commands section on
page 162).
Breakpoints
Execution breakpoints are generated using the BRK instruction (opcode 00H). When the
eZ8 CPU decodes a BRK instruction, it signals the OCD. If breakpoints are enabled, the
OCD enters DEBUG Mode and idles the eZ8 CPU. If breakpoints are not enabled, the
OCD ignores the BRK signal and the BRK instruction operates as an NOP instruction.
Breakpoints in Flash Memory
The BRK instruction is opcode 00H, which corresponds to the fully programmed state of a
byte in Flash memory. To implement a breakpoint, write 00H to the required break
address, overwriting the current instruction. To remove a breakpoint, the corresponding
page of Flash memory must be erased and reprogrammed with the original data.
Runtime Counter
The OCD contains a 16-bit Runtime Counter. It counts system clock cycles between
breakpoints. The counter starts counting when the OCD leaves DEBUG Mode and stops
counting when it enters DEBUG Mode again or when it reaches the maximum count of
FFFFH.
PS024315-1011
PRELIMINARY
Operation