Z8F0113HJ005EG Datasheet, PDF (109/245 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F0823 Series
Product Specification
94
Watchdog Timer Reload High Byte Register (WDTH): see page 95
Watchdog Timer Reload Low Byte Register (WDTL): see page 95
Watchdog Timer Control Register
The Watchdog Timer Control (WDTCTL) register is a write-only control register. Writing
the 55H, AAH unlock sequence to the WDTCTL Register address unlocks the three Watch-
dog Timer Reload Byte registers (WDTU, WDTH and WDTL) to allow changes to the
time-out period. These write operations to the WDTCTL Register address produce no
effect on the bits in the WDTCTL Register. The locking mechanism prevents spurious
writes to the Reload registers.
This register address is shared with the read-only Reset Status Register.
Table 60. Watchdog Timer Control Register (WDTCTL)
Bit
7
6
5
4
3
2
1
0
Field
WDTUNLK
RESET
X
X
X
X
X
X
X
X
R/W
W
W
W
W
W
W
W
W
Address
FF0H
Bit
[7:0]
WDTUNLK
Description
Watchdog Timer Unlock
The software must write the correct unlocking sequence to this register before it is allowed
to modify the contents of the Watchdog Timer reload registers.
Watchdog Timer Reload Upper, High and Low Byte Registers
The Watchdog Timer Reload Upper, High and Low Byte (WDTU, WDTH, WDTL) regis-
ters, shown in Tables 61 through 63, form the 24-bit reload value that is loaded into the
Watchdog Timer when a WDT instruction executes. The 24-bit reload value ranges across
bits [23:0] to encompass the three bytes {WDTU[7:0], WDTH[7:0], WDTL[7:0]}. Writ-
ing to these registers sets the appropriate Reload Value. Reading from these registers
returns the current Watchdog Timer count value.
Caution: The 24-bit WDT Reload Value must not be set to a value less than 000004H.
PS024315-1011
PRELIMINARY
Watchdog Timer Control Register