Z8F0113HJ005EG Datasheet, PDF (54/245 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F0823 Series
Product Specification
39
For correct operation, the LED anode must be connected to V_DD and the cathode must be
connected to the GPIO pin. Using all Port C pins in LED Drive Mode with maximum cur-
rent can result in excessive total current. For the maximum total current for the applicable
package, see the Electrical Characteristics chapter on page 196.
Shared Reset Pin
On the 8-pin product versions, the reset pin is shared with PA2, but the pin is not limited to
output-only when in GPIO Mode.
Caution: If PA2 on the 8-pin product is reconfigured as an input, ensure that no external stimulus
drives the pin Low during any reset sequence. Because PA2 returns to its RESET
alternate function during system resets, driving it Low holds the chip in a reset state until
the pin is released.
Shared Debug Pin
On the 8-pin version of this device only, the Debug pin shares function with the PA0 GPIO
pin. This pin performs as a general purpose input pin on power-up, but the debug logic
monitors this pin during the reset sequence to determine if the unlock sequence occurs. If
the unlock sequence is present, the debug function is unlocked and the pin no longer func-
tions as a GPIO pin. If it is not present, the debug feature is disabled until/unless another
reset event occurs. For more details, see the On-Chip Debugger chapter on page 156.
Crystal Oscillator Override
For systems using a crystal oscillator, PA0 and PA1 are used to connect the crystal. When
the crystal oscillator is enabled (see the Oscillator Control Register Definitions section on
page 171), the GPIO settings are overridden and PA0 and PA1 are disabled.
5 V Tolerance
All six I/O pins on the 8-pin devices are 5 V-tolerant, unless the programmable pull-ups
are enabled. If the pull-ups are enabled and inputs higher than V_DD are applied to these
parts, excessive current flows through those pull-up devices and can damage the chip.
Note: In the 20- and 28-pin versions of this device, any pin which shares functionality with an
ADC, crystal or comparator port is not 5 V-tolerant, including PA[1:0], PB[5:0], and
PS024315-1011
PRELIMINARY
Shared Reset Pin