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| W631GG6KB-15 Datasheet, PDF (89/158 Pages) Winbond – Double Data Rate architecture: two data transfers per clock cycle | |||
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W631GG6KB
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
T12
CK#
CK
CKE
Command
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
tCPDED
tANPD
tCPDEDmin
PD entry transition period
NOP
Last sync, ODT
RTT
RTT
ODTLoff
tAOFmin
tAOFmax
Sync or async, ODT
RTT
RTT
tAOFPDmax
ODTLoff + tAOFmin
tAOFPDmin
ODTLoff + tAOFmax
First async, ODT
RTT
RTT
PD entry transition period
tAOFPDmin
tAOFPDmax
TRANSITIONING DATA
DON'T CARE
Figure 83 â Synchronous to asynchronous transition during Precharge Power Down
(with DLL frozen) entry (AL = 0; CWL = 5; tANPD = WL - 1 = 4)
- 89 -
Publication Release Date: Feb. 27, 2013
Revision A04
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