W631GG6KB-15 Datasheet, PDF (116/158 Pages) Winbond – Double Data Rate architecture: two data transfers per clock cycle

W631GG6KB
Begin point: Rising edge of CK – CK#
defined by the end point of ODTL on
CK
CK#
DQ, DM
DQS, DQS#
VSSQ
tAON
TSW2
TSW1
VSW1
VSW2
End point: Extrapolated point at VSSQ
Figure 99 – Definition of tAON
VTT
VSSQ
Begin point: Rising edge of CK - CK# with
ODT being first registered high
CK
CK#
DQ, DM
DQS, DQS#
VSSQ
tAONPD
TSW2
TSW1
VSW1
VSW2
End point: Extrapolated point at VSSQ
Figure 100 – Definition of tAONPD
VTT
VSSQ
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Publication Release Date: Feb. 27, 2013
Revision A04