W631GG6KB-15 Datasheet, PDF (88/158 Pages) Winbond – Double Data Rate architecture: two data transfers per clock cycle

W631GG6KB
7.19.4.1 Synchronous to Asynchronous ODT Mode Transitions
Table 13 – ODT timing parameters for Power Down (with DLL frozen) entry and exit transition period
Description
ODT to RTT turn-
on delay
ODT to RTT turn-
off delay
tANPD
Min.
Max.
min{ ODTLon * tCK(avg) + tAONmin; tAONPDmin } max{ ODTLon * tCK(avg) + tAONmax; tAONPDmax }
min{ (WL - 2) * tCK(avg) + tAONmin; tAONPDmin } max{ (WL - 2) * tCK(avg) + tAONmax; tAONPDmax }
min{ ODTLoff * tCK(avg) +tAOFmin; tAOFPDmin } max{ ODTLoff * tCK(avg) + tAOFmax; tAOFPDmax }
min{ (WL - 2) * tCK(avg) +tAOFmin; tAOFPDmin } max{ (WL - 2) * tCK(avg) + tAOFmax; tAOFPDmax }
WL -1
7.19.4.2 Synchronous to Asynchronous ODT Mode Transition during Power-Down Entry
If DLL is selected to be frozen in Precharge Power Down Mode by the setting of bit A12 in MR0 to ―0‖,
there is a transition period around power down entry, where the DDR3 SDRAM may show either
synchronous or asynchronous ODT behavior.
The transition period is defined by the parameters tANPD and tCPDED(min). tANPD is equal to (WL -1)
and is counted backwards in time from the clock cycle where CKE is first registered low. tCPDED(min)
starts with the clock cycle where CKE is first registered low. The transition period begins with the
starting point of tANPD and terminates at the end point of tCPDED(min), as shown in Figure 83. If there
is a Refresh command in progress while CKE goes low, then the transition period ends at the later one
of tRFC(min) after the Refresh command and the end point of tCPDED(min), as shown in Figure 84.
Please note that the actual starting point at tANPD is excluded from the transition period, and the actual
end points at tCPDED(min) and tRFC(min), respectively, are included in the transition period.
ODT assertion during the transition period may result in an RTT change as early as the smaller of
tAONPDmin and (ODTLon*tCK(avg) + tAONmin) and as late as the larger of tAONPDmax and (ODTLon*
tCK(avg) + tAONmax). ODT de-assertion during the transition period may result in an RTT change as
early as the smaller of tAOFPDmin and (ODTLoff* tCK(avg) + tAOFmin) and as late as the larger of
tAOFPDmax and (ODTLoff* tCK(avg) + tAOFmax). See Table 13.
Note that, if AL has a large value, the range where RTT is uncertain becomes quite large. Figure 83
shows the three different cases: ODT_A, synchronous behavior before tANPD; ODT_B has a state
change during the transition period; ODT_C shows a state change after the transition period.
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Publication Release Date: Feb. 27, 2013
Revision A04