W631GG6KB-15 Datasheet, PDF (61/158 Pages) Winbond – Double Data Rate architecture: two data transfers per clock cycle

W631GG6KB
CK#
CK
Command^*3
T0
T1
WRITE
NOP
T2
NOP
tCCD
T3
T4
T5
NOP
WRITE
NOP
T6
NOP
T7
NOP
T8
NOP
T9
NOP
T10
T11
T12
NOP
NOP
4 clocks
NOP
T13
NOP
Address^*4
Bank
Col n
DQS, DQS#
Bank
Col b
tWPRE
tWPST
tWPRE
tWPST
DQ^*2
WL = 5
Din
Din
Din
Din
n
n+1
n+2
n+3
WL = 5
Din
Din
Din
Din
b
b+1
b+2
b+3
NOTES:
1. BC4, WL = 5 (CWL = 5, AL = 0)
2. Din n (or b) = data-in from column n (or column b).
3. NOP commands are shown for ease of illustration; other commands may be valid at these times.
4. BC4 setting activated by MR0 A[1:0] = 01 and A12 = 0 during WRITE command at T0 and T4.
5. The write recovery time (tWR) and write timing parameter (tWTR) are referenced from the first rising clock edge at T13 (4 clocks from T9).
TRANSITIONING DATA
T14
NOP
tWR
tWTR
DON'T CARE
Figure 49 – WRITE (BC4) to WRITE (BC4) OTF
CK#
CK
Command^*3
T0
T1
WRITE
NOP
T2
NOP
T3
NOP
T4
NOP
T5
NOP
T6
NOP
T7
NOP
T8
NOP
T9
NOP
Address^*4
Bank
Col n
DQS, DQS#
DQ^*2
WL = 5
tWPRE
tWPST
Din
Din
Din
Din
Din
Din
Din
Din
n
n+1
n+2
n+3
n+4
n+5
n+6
n+7
NOTES:
1. RL = 6 (CL = 6, AL = 0), WL = 5 (CWL = 5, AL = 0)
2. Din n = data-in from column n; Dout b = data-out from column b.
3. NOP commands are shown for ease of illustration; other commands may be valid at these times.
4. BL8 setting activated by either MR0 A[1:0] = 00 or MR0 A[1:0] = 01 and A12 = 1 during WRITE command at T0.
READ command at T13 can be either BC4 or BL8 depending on MR0 A[1:0] and A12 status at T13.
Figure 50 – WRITE (BL8) to READ (BC4/BL8) OTF
T10
NOP
T11
T12
T13
T14
NOP
tWTR
NOP
READ
Bank
Col b
NOP
RL = 6
TRANSITIONING DATA
DON'T CARE
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Publication Release Date: Feb. 27, 2013
Revision A04