W631GG6KB-15 Datasheet, PDF (131/158 Pages) Winbond – Double Data Rate architecture: two data transfers per clock cycle

W631GG6KB
9.13.2 IDD Current Specifications
Speed Bin
DDR3-1333
DDR3-1600 DDR3-1866
SYM.
Part Number Extension
-15/15I/15A/15K -12/12I/12A/12K
-11
UNIT
DEFINITION
MAX.
MAX.
MAX.
IDD0
Operating One Bank Active-Precharge
Current
105
IDD1
Operating One Bank Active-Read-
Precharge Current
130
IDD2N Precharge Standby Current
75
IDD2NT Precharge Standby ODT Current
90
115
130
mA
145
165
mA
80
85
mA
105
120
mA
IDD2P0 Precharge Power Down Current Slow Exit
14
IDD2P1 Precharge Power Down Current Fast Exit
35
IDD2Q Precharge Quiet Standby Current
70
14
14
mA
40
45
mA
80
90
mA
IDD3N Active Standby Current
IDD3P Active Power Down Current
75
85
95
mA
65
75
85
mA
IDD4R Operating Burst Read Current
240
280
330
mA
IDD4W Operating Burst Write Current
IDD5B Burst Refresh Current
190
220
260
mA
160
170
185
mA
IDD6
Self-Refresh Current, TOPER = 0 - 85°C
14
IDD6ET Self-Refresh Current, TOPER = 0 - 95°C
17
14
14
mA
17
17
mA
IDD7
Operating Bank Interleave Read Current
380
400
430
mA
IDD8 RESET# Low Current
14
14
14
mA
Notes:
1. Max. values for IDD currents consider worst case conditions of process, temperature and voltage.
2. The IDD values must be derated (increased) when operated outside the range 0°C ≤ TCASE ≤ 85°C:
(a) When TCASE < 0°C: IDD2P0, IDD2P1 and IDD3P must be derated by 4%; IDD4R and IDD5W must be derated by 2%; and
IDD6, IDD6ET and IDD7 must be derated by 7%.
(b) When TCASE > 85°C: IDD0, IDD1, IDD2N, IDD2NT, IDD2Q, IDD3N, IDD3P, IDD4R, IDD4W, and IDD5B must be derated by
2%; and IDD2P0, IDD2P1 must be derated by 30%.
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Publication Release Date: Feb. 27, 2013
Revision A04