W631GG6KB-15 Datasheet, PDF (62/158 Pages) Winbond – Double Data Rate architecture: two data transfers per clock cycle

W631GG6KB
CK#
CK
Command^*3
Address^*4
DQS, DQS#
DQ^*2
T0
T1
WRITE
Bank
Col n
NOP
T2
T3
NOP
NOP
WL = 5
T4
T5
T6
T7
NOP
NOP
tWPRE
NOP
NOP
4 clocks
tWPST
Din
Din
Din
Din
n
n+1
n+2
n+3
NOTES:
1. RL = 6 (CL = 6, AL = 0), WL = 5 (CWL = 5, AL = 0)
2. Din n = data-in from column n; Dout b = data-out from column b.
3. NOP commands are shown for ease of illustration; other commands may be valid at these times.
4. BC4 setting activated by MR0 A[1:0] = 01 and A12 = 0 during WRITE command at T0.
READ command at T13 can be either BC4 or BL8 depending on MR0 A[1:0] and A12 status at T13.
T8
NOP
T9
NOP
Figure 51 – WRITE (BC4) to READ (BC4/BL8) OTF
CK#
CK
Command^*3
T0
T1
WRITE
NOP
T2
NOP
T3
NOP
T4
NOP
T5
NOP
T6
NOP
T7
NOP
Address^*4
Bank
Col n
DQS, DQS#
DQ^*2
WL = 5
tWPRE
tWPST
Din
Din
Din
Din
n
n+1
n+2
n+3
NOTES:
1. RL = 6 (CL = 6, AL = 0), WL = 5 (CWL =5, AL = 0)
2. Din n = data-in from column n; Dout b = data-out from column b.
3. NOP commands are shown for ease of illustration; other commands may be valid at these times.
4. BC4 setting activated by MR0 A[1:0] = 10.
T8
NOP
T9
NOP
tWTR
T10
NOP
T10
NOP
T11
T12
T13
T14
NOP
tWTR
NOP
READ
Bank
Col b
NOP
RL = 6
TRANSITIONING DATA
DON'T CARE
T11
T12
READ
Bank
Col b
NOP
T13
NOP
T14
NOP
RL = 6
TRANSITIONING DATA
DON'T CARE
Figure 52 – WRITE (BC4) to READ (BC4)
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Publication Release Date: Feb. 27, 2013
Revision A04