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JDP2S01T Datasheet, PDF (99/150 Pages) Toshiba Semiconductor – UHF~VHF Band RF Attenuator Applications
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Table 73: HcScratch register: bit description
Bit
Symbol
Access Value Description
15 to 0 Scratch[15:0] R/W
0000H Scratch register value.
15.5.3 HcSoftwareReset register (W: A9H)
This register provides a means for software reset of the HC. To reset the HC, the
HCD must write a reset value of F6H to this register. On receiving this reset value,
the HC resets all the HC and OTG registers, except its buffer memory.
Table 74 contains the bit description of the register.
Code (Hex): A9 — write only
Table 74: HcSoftwareReset register: bit description
Bit
Symbol
Access Value Description
15 to 0 ResetValue W
[15:0]
0000H Writing a reset value of F6H causes the HC to
reset all the registers except its buffer memory.
15.6 HC buffer RAM control registers
15.6.1 HcBufferStatus register (R/W: 2CH/ACH)
The bit allocation of the HcBufferStatus register is given in Table 75.
Code (Hex): 2C — read
Code (Hex): AC — write
Table 75:
Bit
Symbol
HcBufferStatus register: bit allocation
15
14
13
reserved
Reset
Access
Bit
Symbol
Reset
Access
-
-
7
reserved
-
-
-
-
6
ISTL1_
Active
Status
0
R
-
-
5
ISTL0_
Active
Status
0
R
12
-
-
4
Reset_HW
PingPong
Reg
0
R/W
11
-
-
3
ATL_Active
0
R/W
10
PairedPTD
PingPong
0
R
2
INTL_
Active
0
R/W
9
ISTL1
BufferDone
0
R
1
ISTL1
BufferFull
0
R/W
8
ISTL0
BufferDone
0
R
0
ISTL0
BufferFull
0
R/W
9397 750 12337
Product data
Table 76: HcBufferStatus register: bit description
Bit
Symbol
Description
15 to 11 -
reserved
10
PairedPTDPingPong 0 — Ping of paired PTD in ATL is active.
1 — Pong of paired PTD in ATL is active.
9
ISTL1
0 — The ISTL1 buffer has not yet been read by the HC.
BufferDone
1 — The ISTL1 buffer has been read by the HC.
8
ISTL0
0 — The ISTL0 buffer has not yet been read by the HC.
BufferDone
1 — The ISTL0 buffer has been read by the HC.
Rev. 03 — 06 January 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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