JDP2S01T Datasheet, PDF (65/150 Pages) Toshiba Semiconductor – UHF~VHF Band RF Attenuator Applications

Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Table 27:
Bit
6
OtgInterrupt register: bit description…continued
Symbol
Description
OTG_
SUSPND
This bit is set whenever the OTG port goes into the suspend state
(bus idle for > 3 ms). Write logic 1 to clear this bit. Writing logic 0
has no effect.
0 — no event
1 — suspend (bus idle for > 3 ms)
5
RMT_
This bit is set whenever the RMT_CONN bit of the OtgStatus
CONN_C register changes. Write logic 1 to clear this bit. Writing logic 0 has
no effect.
0 — no event
1 — RMT_CONN bit has changed
4
B_SESS_ This bit is set whenever the B_SESS_VLD bit of the OtgStatus
VLD_C
register changes. Write logic 1 to clear this bit. Writing logic 0 has
no effect.
0 — no event
1 — bit B_SESS_VLD has changed
3
A_SESS_ This bit is set whenever the A_SESS_VLD bit of the OtgStatus
VLD_C
register changes. Write logic 1 to clear this bit. Writing logic 0 has
no effect.
0 — no event
1 — bit A_SESS_VLD has changed
2
B_SESS_ This bit is set whenever the B_SESS_END bit of the OtgStatus
END_C
register changes. Write logic 1 to clear this bit. Writing logic 0 has
no effect.
0 — no event
1 — bit B_SESS_END has changed
1
A_VBUS_ This bit is set whenever the A_VBUS_VLD bit of the OtgStatus
VLD_C
register changes. Write logic 1 to clear this bit. Writing logic 0 has
no effect.
0 — no event
1 — bit A_VBUS_VLD has changed
0
ID_REG_C This bit is set whenever the ID_REG bit of the OtgStatus register
changes. This is an indication that the mini-A plug is inserted or
removed (that is, the ID pin is shorted to ground or pulled HIGH).
Write logic 1 to clear this bit. Writing logic 0 has no effect.
0 — no event
1 — ID_REG bit has changed
9397 750 12337
Product data
Rev. 03 — 06 January 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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