JDP2S01T Datasheet, PDF(48/150 Page) Toshiba Semiconductor – UHF~VHF Band RF Attenuator Applications

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JDP2S01T Datasheet, PDF (48/150 Pages) Toshiba Semiconductor – UHF~VHF Band RF Attenuator Applications

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Philips Semiconductors

ISP1362

Single-chip USB OTG controller

external OC detection circuit, set AnalogOCEnable, bit 10 of register

HcHardwareConï¬guration, to logic 0. By default after reset this bit is set to logic 0.

Therefore, the HC Driver does not need to clear this bit.

Figure 24 shows how to use an external OC detection circuit.

PSU_5V

OC DETECTION

VIN

H_OCn

C41(1)

FB2

C17

0.1 ÂµF

VOUT

VBUS 1

DM 2

DP 3

GND 4

chassis 5

chassis 6

004aaa149

DGND

(1) 100 ÂµF for the host port or 4.7 ÂµF for the OTG port.

Fig 24. Using external OC detection circuit.

H_PSWn

12.8.3 OC detection circuit using internal charge pump in the OTG mode

When port 1 is operating in the OTG mode, you may choose to use the internal

charge pump to provide 5 V VBUS, or supply VBUS from an external source. In this

mode, the overcurrent condition is detected by a drop in VBUS that will be sensed by

the built-in comparator. The overcurrent condition causes a change in the

A_VBUS_VLD bit of the OtgStatus register. The software has to clear the

DRV_VBUS bit in the OtgControl register when it detects the A_VBUS_VLD bit

turning to logic 0.

9397 750 12337

Product data

Rev. 03 â 06 January 2004

48 of 150

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