JDP2S01T Datasheet, PDF (67/150 Pages) Toshiba Semiconductor – UHF~VHF Band RF Attenuator Applications

Philips Semiconductors
ISP1362
Single-chip USB OTG controller
14.5 OtgTimer register (R/W: 6AH/EAH)
Code (Hex): 6A — read
Code (Hex): EA — write
Table 30: OtgTimer register: bit allocation
Bit
31
30
29
28
27
26
25
24
Symbol
START_
TMR
reserved
Reset
0
-
-
-
-
-
-
-
Access
R/W
-
-
-
-
-
-
-
Bit
23
22
21
20
19
18
17
16
Symbol
TMR_INIT_VALUE[23:16]
Reset
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit
15
14
13
12
11
10
9
8
Symbol
TMR_INIT_VALUE[15:8]
Reset
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit
7
6
5
4
3
2
1
0
Symbol
TMR_INIT_VALUE[7:0]
Reset
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 31: OtgTimer register: bit description
Bit
Symbol Description
31
START_ This is the start or stop bit of the OTG timer. Writing logic 1 will
TMR
cause the OTG timer to load TMR_INIT_VALUE into the counter
and start to count. Writing logic 0 will stop the timer. This bit is
automatically cleared when the OTG timer is timed out.
30 to 24
23 to 0
0 — stop the timer
1 — start the timer
-
reserved
TMR_INIT_ These bits define the initial value used by the OTG timer. The timer
VALUE
interval is 0.01 ms. Maximum timer allowed is 167.772 s.
[23:0]
9397 750 12337
Product data
Rev. 03 — 06 January 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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