JDP2S01T Datasheet, PDF (137/150 Pages) Toshiba Semiconductor – UHF~VHF Band RF Attenuator Applications

Philips Semiconductors
ISP1362
Single-chip USB OTG controller
A0
tAVRL
CS / DACK2⁽²⁾
RD
D[15:0]
t _RLDV
t _RLRH
t _RHAX
t _SHDZ
t _SHRL⁽¹⁾
t _RHSH
(1) For t_SHRL both CS and RD must be deasserted.
(2) Programmable polarity: shown as active LOW.
Fig 31. DC Programmed interface read timing (I/O and 8237 compatible DMA).
A0
CS / DACK2⁽²⁾
WR
D[15:0]
t _WHAX
tAVWL
t _WLWH
t _SHWL⁽¹⁾
t _WHSH
t _DVWH
t _WHDZ
(1) For t_SHWL both CS and WR must be deasserted.
(2) Programmable polarity: shown as active LOW.
Fig 32. DC Programmed interface write timing (I/O and 8237 compatible DMA).
004aaa105
004aaa106
9397 750 12337
Product data
Rev. 03 — 06 January 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
137 of 150