JDP2S01T Datasheet, PDF (135/150 Pages) Toshiba Semiconductor – UHF~VHF Band RF Attenuator Applications

Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Table 150: Dynamic characteristics: charge pump…continued
V_CC = 3.0 V to 3.6 V; GND = 0 V; T_amb = −40 °C to +85 °C; C_LOAD = 2 µF; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
t_{VBUS(VALID_dly)} minimum time V_BUS(VALID)
error
100
-
t_VBUS(PULSE)
t_{VBUS(VALID_dly)}
V_RIPPLE
V_BUS pulsing time
V_BUS pull-down time
output ripple with constant
load
I_LOAD = 8 mA
10
-
50
-
-
-
Max
200
30
-
50
Unit
µs
ms
ms
mV
20.1 Programmed I/O timing
• If you are accessing only the HC, then the HC programmed I/O timing applies.
• If you are accessing only the DC, then the DC programmed I/O timing applies.
• If you are accessing both the HC and the DC, then the DC programmed I/O timing
applies.
20.1.1 HC Programmed I/O timing
Table 151: Dynamic characteristics: HC Programmed interface timing
Symbol
Parameter
Conditions
Min
t_AS
address set-up time before CS
5
t_AH
address hold time after CS
2
Read timing
t_{SHSL_R}
first RD/WR after command
(A0 = HIGH)
register access
300
t_{SHSL_B}
first RD/WR after command
buffer access
462
(A0 = HIGH)
t_SLRL
CS LOW to RD LOW
0
t_RHSH
RD HIGH to CS HIGH
0
t_RL
RD LOW pulse width
33
t_RHRL
RD HIGH to next RD LOW
110
T_RC
RD cycle
143
t_RHDZ
RD data hold time
-
t_RLDV
RD LOW to data valid
-
Write timing
t_WL
WR LOW pulse width
26
t_WHWL
WR HIGH to next WR LOW
110
T_WC
WR cycle
136
t_SLWL
CS LOW to WR LOW
0
t_WHSH
WR HIGH to CS HIGH
0
t_WDSU
WR data set-up time
3
t_WDH
WR data hold time
4
Typ Max
Unit
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
3
ns
-
22
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
9397 750 12337
Product data
Rev. 03 — 06 January 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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