JDP2S01T Datasheet, PDF (87/150 Pages) Toshiba Semiconductor – UHF~VHF Band RF Attenuator Applications

Philips Semiconductors
ISP1362
Single-chip USB OTG controller
15.3.4 HcRhPortStatus[1:2] register (R/W [1]: 15H/95H; [2]: 16H/96H)
The HcRhPortStatus[1:2] register is used to control and report port events on a
per-port basis. NumberDownstreamPorts represents the number of HcRhPortStatus
registers that are implemented in hardware. The lower word is used to reflect the port
status, whereas the upper word reflects the status change bits. Some status bits are
implemented with special write behavior. If a transaction (token through handshake)
is in progress when a write to change port status occurs, the resulting port status
change must be postponed until the transaction completes. Reserved bits should
always be written logic 0. The bit allocation of the HcRhPortStatus[1:2] register is
given in Table 61.
Code (Hex): [1] = 15, [2] = 16 — read
Code (Hex): [1] = 95, [2] = 96 — write
Table 61: HcRhPortStatus[1:2] register: bit allocation
Bit
31
30
29
28
27
Symbol
reserved
Reset
-
-
-
-
-
Access
-
-
-
-
-
Bit
23
22
21
20
19
Symbol
reserved
PRSC
OCIC
Reset
-
-
-
0
0
Access
-
-
-
R/W
R/W
Bit
15
14
13
12
11
Symbol
reserved
Reset
-
-
-
-
-
Access
-
-
-
-
-
Bit
7
6
5
4
3
Symbol
reserved
PRS
POCI
Reset
-
-
-
0
0
Access
-
-
-
R/W
R/W
26
-
-
18
PSSC
0
R/W
10
-
-
2
PSS
0
R/W
25
-
-
17
PESC
0
R/W
9
LSDA
0
R/W
1
PES
0
R/W
24
-
-
16
CSC
0
R/W
8
PPS
0
R/W
0
CCS
0
R/W
9397 750 12337
Product data
Rev. 03 — 06 January 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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