JDP2S01T Datasheet, PDF (68/150 Pages) Toshiba Semiconductor – UHF~VHF Band RF Attenuator Applications

Philips Semiconductors
ISP1362
Single-chip USB OTG controller
14.6 OtgAltTimer register (R/W: 6CH/ECH)
Code (Hex): 6C — read
Code (Hex): EC — write
Table 32: OtgAltTimer register: bit allocation
Bit
31
30
29
28
27
26
25
24
Symbol
START_
TMR
reserved
Reset
0
-
-
-
-
-
-
-
Access
R/W
-
-
-
-
-
-
-
Bit
23
22
21
20
19
18
17
16
Symbol
CURRENT_TIME[23:16]
Reset
0
0
0
0
0
0
0
0
Access
R
R
R
R
R
R
R
R
Bit
15
14
13
12
11
10
9
8
Symbol
CURRENT_TIME[15:8]
Reset
0
0
0
0
0
0
0
0
Access
R
R
R
R
R
R
R
R
Bit
7
6
5
4
3
2
1
0
Symbol
CURRENT_TIME[7:0]
Reset
0
0
0
0
0
0
0
0
Access
R
R
R
R
R
R
R
R
Table 33: OtgAltTimer register: bit description
Bit
Symbol
Description
31
START_ This is the start or stop bit of the OTG timer 2. Writing logic 1 will
TMR
cause the OTG timer 2 to start counting from 0. When the counter
reaches FFFFFFH, this bit is auto-cleared (the counter is stopped).
Writing logic 0 will stop the counting.
If any bit of the OTGInterrupt register is set and the corresponding
bit of the OtgInterruptEnable register is also set, this bit will be
auto-cleared and the current value of the counter will be written to
the CURRENT_TIME field.
30 to 24
23 to 0
0 — stop the timer
1 — start the timer
-
reserved
CURRENT_ When read, these bits give the current value of the timer. The
TIME
actual time is CURRENT_TIME × 0.01 ms.
9397 750 12337
Product data
Rev. 03 — 06 January 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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