JDP2S01T Datasheet, PDF (90/150 Pages) Toshiba Semiconductor – UHF~VHF Band RF Attenuator Applications

Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Table 62:
Bit
4
HcRhPortStatus[1:2] register: bit description…continued
Symbol Description
PRS
On read—PortResetStatus: When this bit is set by a write to
SetPortReset, port reset signaling is asserted. When reset is
completed, this bit is cleared when PortResetStatusChange
(PRSC) is set. This bit cannot be set if CurrentConnectStatus
(CCS) is cleared.
0 — port reset signal is not active
1 — port reset signal is active
On write—SetPortReset: The HCD sets the port reset signaling
by writing logic 1 to this bit. Writing logic 0 has no effect. If
CurrentConnectStatus (CCS) is cleared, this write does not set
PortResetStatus (PRS) but instead sets ConnectStatusChange
(CSC). This informs the driver that it attempted to reset a
disconnected port.
3
POCI
On read—PortOverCurrentIndicator: This bit is valid only when
the Root Hub is configured in such a way that overcurrent
conditions are reported on a per-port basis. If per-port overcurrent
reporting is not supported, this bit is set to logic 0. If cleared, all
power operations are normal for this port. If set, an overcurrent
condition exists on this port. This bit always reflects the overcurrent
input signal
0 — no overcurrent condition
1 — overcurrent condition detected
On write—ClearSuspendStatus: The HCD writes logic 1 to
initiate a resume. Writing logic 0 has no effect. A resume is
initiated only if PortSuspendStatus (PSS) is set.
9397 750 12337
Product data
Rev. 03 — 06 January 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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