JDP2S01T Datasheet, PDF (8/150 Pages) Toshiba Semiconductor – UHF~VHF Band RF Attenuator Applications

Philips Semiconductors
ISP1362
Single-chip USB OTG controller
7.2 Pin description
Table 2: Pin description
Symbol^[1]
Pin
Ball
Type^[2]
LQFP64 TFBGA64
DGND
1
B1
-
D2
2
C2
I/O
D3
3
C1
I/O
V_CC
4
D2
-
D4
5
D1
I/O
D5
6
E2
I/O
D6
7
E1
I/O
D7
8
F2
I/O
DGND
D8
9
F1
-
10
G2
I/O
D9
11
G1
I/O
D10
12
H2
I/O
D11
13
H1
I/O
Description
digital ground
bit 2 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, three-state output
bit 3 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, three-state output
supply voltage (3.3 V); it is recommended to connect a decoupling
capacitor of 0.01 µF
bit 4 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, three-state output
bit 5 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, three-state output
bit 6 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, three-state output
bit 7 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, three-state output
digital ground
bit 8 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, three-state output
bit 9 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, three-state output
bit 10 of the bidirectional data bus that connects to the internal
registers and buffer memory of the ISP1362; the bus is in the
high-impedance state when it is idle
bidirectional, push-pull input, three-state output
bit 11 of the bidirectional data bus that connects to the internal
registers and buffer memory of the ISP1362; the bus is in the
high-impedance state when it is idle
bidirectional, push-pull input, three-state output
9397 750 12337
Product data
Rev. 03 — 06 January 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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