JDP2S01T Datasheet, PDF (18/150 Pages) Toshiba Semiconductor – UHF~VHF Band RF Attenuator Applications

Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Starting address of ISTL0 or ISTL1
PTD header (Total size = 64)
PTD payload (64 bytes)
72 bytes (64 + 8)
PTD header (Total size = 160)
PTD payload (160 bytes)
168 bytes (160 + 8)
PTD header (Total size = 32)
PTD payload (32 bytes)
40 bytes (32 + 8)
004aaa054
‘Total size’ is a 10-bit field in the PTD.
Fig 6. A sample snapshot of the ISTL memory management scheme.
9.1.2 Memory organization for the DC
The ISP1362 DC has a total of 2462 bytes of built-in buffer memory. This buffer
memory is multiconfigurable to support the requirements of different applications. The
DC buffer memory is divided into 16 areas to be used by control OUT, control IN and
14 programmable endpoints.
Figure 7 provides a snapshot of the DC buffer memory.
9397 750 12337
Product data
Rev. 03 — 06 January 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
18 of 150