JDP2S01T Datasheet, PDF (62/150 Pages) Toshiba Semiconductor – UHF~VHF Band RF Attenuator Applications

Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Table 23: OtgControl register: bit description…continued
Bit
Symbol Description
4
LOC_
0 — disconnect the on-chip pull-up resistor on DP of the OTG port
CONN
1 — connect the on-chip pull-up resistor on DP of the OTG port
3
SEL_CP_ This bit is for the A-device only. This bit is used to choose the power
EXT
source to drive V_BUS.
0 — use on-chip charge pump to drive V_BUS
1 — use external power source (+5 V) to drive V_BUS
Remark: When using the external power source, the H_PSW1 pin
serves as the power switch that is controlled by the DRV_VBUS bit of
this register.
2
DISCHRG_ This bit is for the B-device only. If set, it will enable a pull-down
VBUS
resistor on V_BUS, which will help to speed up discharging of V_BUS
below session end threshold voltage.
0 — disable
1 — enable
1
CHRG_
This bit is for the B-device only. If set, it will charge V_BUS through a
VBUS
resistor.
0 — disable charging V_BUS of the OTG port
1 — enable charging V_BUS of the OTG port
0
DRV_VBUS This bit is used to enable the on-chip charge pump or external power
source to drive V_BUS. For the B-device, it shall not enable this bit at
any time.
0 — disable driving V_BUS of the OTG port
1 — enable driving V_BUS of the OTG port
14.2 OtgStatus register (R: 67H)
Code (Hex): 67 — read only
Table 24: OtgStatus register: bit allocation
Bit
15
14
13
12
Symbol
reserved
Reset
-
-
-
-
Access
-
-
-
-
Bit
7
6
5
4
Symbol
reserved
RMT_
CONN
B_SESS_
VLD
Reset
-
-
0
0
Access
-
-
R
R
11
-
-
3
A_SESS_
VLD
0
R
10
-
-
2
B_SESS_
END
1
R
9
SE0_2MS
0
R
1
A_VBUS_
VLD
0
R
8
reserved
-
-
0
ID_REG
1
R
9397 750 12337
Product data
Rev. 03 — 06 January 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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