JDP2S01T Datasheet, PDF (115/150 Pages) Toshiba Semiconductor – UHF~VHF Band RF Attenuator Applications

Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Table 113: DcMode register: bit description
Bit
Symbol
Description
7 to 6
-
reserved
5
GOSUSP
Writing logic 1 followed by logic 0 will activate the ‘suspend’
mode.
4
-
reserved
3
INTENA
Logic 1 enables all interrupts. Bus reset value: unchanged.
2
DBGMOD
Logic 1 enables debug mode, in which all NAKs and errors will
generate an interrupt. Logic 0 selects normal operation, in which
interrupts are generated on every ACK (bulk endpoints) or after
every data transfer (isochronous endpoints). Bus reset value:
unchanged.
1
-
reserved
0
SOFTCT
Logic 1 enables SoftConnect. This bit is ignored if EXTPUL = 1
in the DcHardwareConfiguration register (see Table 114). Bus
reset value: unchanged.
Remark: In the OTG mode, this bit is ignored. The LOC_CONN
bit of the OtgControl register controls the pull-up resistor on the
OTG_DP1 pin.
16.1.4 DcHardwareConfiguration register (R/W: BBH/BAH)
This command is used to access the DcHardwareConfiguration register, which
consists of two bytes. The first (lower) byte contains the device configuration and
control values, the second (upper) byte holds the clock control bits and the clock
division factor. The bit allocation is given in Table 114. A bus reset will not change any
of the programmed bit values.
The DcHardwareConfiguration register controls the connection to the USB bus, clock
activity and power supply during the ‘suspend’ state, as well as output clock
frequency, DMA operating mode and pin configurations (polarity, signalling mode).
Code (Hex): BA/BB — write or read DcHardwareConfiguration register
Transaction — write or read 2 bytes (code or data)
Table 114: DcHardwareConfiguration register: bit allocation
Bit
15
14
13
12
Symbol
reserved EXTPUL NOLAZY CLKRUN
Reset
-
0
1
0
Access
-
R/W
R/W
R/W
Bit
7
6
5
4
Symbol
DAKOLY DRQPOL DAKPOL reserved
Reset
0
1
0
0
Access
R/W
R/W
R/W
-
11
0
R/W
3
WKUPCS
0
R/W
10
9
CKDIV[3:0]
0
1
R/W
R/W
2
1
reserved INTLVL
1
0
R/W
R/W
8
1
R/W
0
INTPOL
0
R/W
9397 750 12337
Product data
Rev. 03 — 06 January 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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