English
Language : 

JDP2S01T Datasheet, PDF (2/150 Pages) Toshiba Semiconductor – UHF~VHF Band RF Attenuator Applications
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
s USB host:
x Supports integrated physical 4096 bytes of multiconfiguration memory
x Supports all four types of USB transfers: control, bulk, interrupt and
isochronous
x Supports multiframe buffering for isochronous transfer
x Supports automatic interrupt polling rate mechanism
x Supports paired buffering for bulk transfer
x Directly addressable memory architecture; memory can be updated on-the-fly
s USB device:
x Supports high performance USB interface device with integrated Serial
Interface Engine (SIE), buffer memory and transceiver
x Supports fully autonomous and multiconfiguration DMA operation
x Supports up to 14 programmable USB endpoints with 2 fixed control IN/OUT
endpoints
x Supports integrated physical 2462 bytes of multiconfiguration memory
x Supports endpoints with double buffering to increase throughput and ease
real-time data transfer
x Supports controllable LazyClock (110 kHz ± 50 %) output during ‘suspend’
s Supports two USB ports: port 1 and port 2
x Port 1 can be configured to function as a downstream port, an upstream port
or an OTG port
x Port 2 can be used only as a downstream port
s Supports software-controlled connection to the USB bus (SoftConnect™)
s Supports good USB connection indicator that blinks with traffic (GoodLink™)
s Complies with USB power management requirements
s Supports internal power-on and low-voltage reset circuit, with possibility of a
software reset
s Supports operation over the extended USB voltage range (4.0 V to 5.5 V) with
5 V tolerant I/O pads
s High-speed parallel interface to most CPUs available in the market, such as
Hitachi SH-3, Intel® StrongARM®, Philips XA, Fujitsu SPARClite®, NEC and
Toshiba MIPS, ARM7/9, Motorola DragonBall™ and PowerPC™ Reduced
Instruction Set Computer (RISC):
x 16-bit data bus
x 10 Mbyte/s data transfer rate between the microprocessor and ISP1362
s Supports Programmed I/O (PIO) or Direct Memory Access (DMA)
s Supports ‘suspend’ and remote wake-up
s Uses 12 MHz crystal or direct clock source with on-chip Phase-Locked Loop
(PLL) for low Electro-Magnetic Interference (EMI)
s Operates at +3.3 V power supply
s Operating temperature range from −40 °C to +85 °C
s Available in 64-pin LQFP and TFBGA packages.
9397 750 12337
Product data
Rev. 03 — 06 January 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
2 of 150