JDP2S01T Datasheet, PDF (96/150 Pages) Toshiba Semiconductor – UHF~VHF Band RF Attenuator Applications

Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Table 69: HcµPInterrupt register: bit description
Bit
Symbol Description
15 to 10 -
reserved
9
OTG_IRQ 0 — no event
1 — The OTG interrupt event needs to read the OtgInterrupt
register to get the cause of the interrupt.
8
ATL_IRQ 0 — no event
1 — Count value of the HcATLDoneThresholdCount register or the
time-out value of the HcATLPTDDoneThresholdTimeOut register
has reached. The microprocessor is required to read
HcINTLPTDDoneMap to check the PTDs that have completed
their transactions.
7
INTL_IRQ 0 — no event
1 — The HC has detected the last PTD, and there is at least one
interrupt transaction that has received ACK from the device. The
microprocessor is required to read HcINTLPTDDoneMap to check
the PTDs that have received ACK from the device.
6
ClkReady 0 — no event
1 — The HC has awakened from the ‘suspend’ state, and its
internal clock has turned on again.
5
HC
0 — no event
Suspended _{1 — The HC has been suspended and no USB activities are sent}
from the microprocessor for each ms. The microprocessor can
suspend the HC by setting bits 6 and 7 of the HcControl register to
logic 1. Once the HC is suspended, no SOF needs to be sent to
the devices connected to downstream ports.
4
OPR_Reg 0 — no event
1 — An HC operation has caused a hardware interrupt. It is
necessary for the HCD to read the HcInterruptStatus register to
determine the cause of the interrupt.
3
AllEOT
0 — no event
Interrupt _{1 — Data transfer has been completed by using the PIO transfer or}
the DMA transfer. This bit is set either when the value of the
HcTransferCounter register has reached zero, or the EOT pin of
the HC is triggered by an external signal.
9397 750 12337
Product data
Rev. 03 — 06 January 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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