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JDP2S01T Datasheet, PDF (85/150 Pages) Toshiba Semiconductor – UHF~VHF Band RF Attenuator Applications | |||
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Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Table 58: HcRhDescriptorB register: bit description
Bit
Symbol Description
31 to 19 -
reserved
18 to 16
PPCM[2:0]
PortPowerControlMask: Each bit indicates whether a port is
affected by a global power control command when
PowerSwitchingMode is set. When set, the power state of the port
is only affected by per-port power control (Set/ClearPortPower).
When cleared, the port is controlled by the global power switch
(Set/ClearGlobalPower). If the device is conï¬gured to global
switching mode (PowerSwitchingMode = 0), this ï¬eld is not valid.
15 to 3
2 to 0
-
DR[2:0]
Bit 2 â Ganged-power mask on port 2
Bit 1 â Ganged-power mask on port 1
Bit 0 â reserved
reserved
DeviceRemovable: Each bit is dedicated to a port of the Root
Hub. When cleared, the attached device is removable. When set,
the attached device is not removable.
Bit 2 â Device attached to port 2
Bit 1 â Device attached to port 1
Bit 0 â reserved
15.3.3 HcRhStatus register (R/W: 14H/94H)
The HcRhStatus register is divided into two parts. The lower word of a DWord
represents the Hub Status ï¬eld and the upper word represents the Hub Status
Change ï¬eld. Reserved bits should always be written as logic 0. See Table 59 for bit
allocation of the register.
Code (Hex): 14 â read
Code (Hex): 94 â write
Table 59: HcRhStatus register: bit allocation
Bit
31
30
29
28
27
26
Symbol
CRWE
reserved
Reset
0
-
-
-
-
-
Access
W
-
-
-
-
-
Bit
23
22
21
20
19
18
Symbol
reserved
Reset
-
-
-
-
-
-
Access
-
-
-
-
-
-
Bit
15
14
13
12
11
10
Symbol
DRWE
reserved
Reset
0
-
-
-
-
-
Access
R/W
-
-
-
-
-
25
-
-
17
CCIC
0
R/W
9
-
-
24
-
-
16
LPSC
0
R/W
8
-
-
9397 750 12337
Product data
Rev. 03 â 06 January 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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