TLK3131_15 Datasheet, PDF (83/102 Pages) Texas Instruments – Single Channel Multi-Rate Transceiver

TLK3131
www.ti.com
SLLS957A – DECEMBER 2008 – REVISED DECEMBER 2009
Table A-2. Reference Clock Selection – 1X/2X Fibre Channel Mode
TLK3131 REFLK Jitter Cleaner
Input (MHz)
Multiplier
53.12500
53.12500
53.12500
53.12500
53.12500
106.25000
106.25000
106.25000
106.25000
106.25000
212.50000
212.50000
212.50000
212.50000
OFF
0.25
0.5
1
2
OFF
0.25
0.5
1
2
OFF
0.25
0.5
1
Fibre Channel Mode - Legal Clocking Mode Settings
SERDES
REFCLK Input
(MHz)
SERDES PLL
Multiplier
Serial Data Rate = f(SPEED[1:0]) (Mbps)
Full (00)
Half (01)
Qrtr. (10)
53.12500
20
2125.000
1062.500
13.28125
26.56250
53.12500
20
2125.000
1062.500
106.25000
10
2125.000
1062.500
106.25000
10
2125.000
1062.500
26.56250
53.12500
20
2125.000
1062.500
106.25000
10
2125.000
1062.500
212.50000
5
2125.000
1062.500
212.50000
5
2125.000
1062.500
53.12500
20
2125.000
1062.500
106.25000
10
2125.000
1062.500
212.50000
5
2125.000
1062.500
Table A-3. Reference Clock Selection – OBSAI Mode
TLK3131 REFLK Jitter Cleaner
Input (MHz)
Multiplier
76.80000
76.80000
76.80000
76.80000
76.80000
153.60000
153.60000
153.60000
153.60000
153.60000
307.20000
307.20000
307.20000
307.20000
307.20000
OFF
0.25
0.5
1
2
OFF
0.25
0.5
1
2
OFF
0.25
0.5
1
2
Gigabit Ethernet Mode - Legal Clocking Mode Settings
SERDES
REFCLK Input
(MHz)
SERDES PLL
Multiplier
Serial Data Rate = f(SPEED[1:0]) (Mbps)
Full (00)
Half (01)
Qrtr. (10)
76.80000
20
3072.000
1536.000
768.000
19.20000
38.40000
76.80000
20
3072.000
1536.000
768.000
153.60000
10
3072.000
1536.000
768.000
153.60000
10
3072.000
1536.000
768.000
38.40000
76.80000
20
3072.000
1536.000
768.000
153.60000
10
3072.000
1536.000
768.000
307.20000
5
3072.000
1536.000
768.000
307.20000
5
3072.000
1536.000
768.000
76.80000
20
3072.000
1536.000
768.000
153.60000
10
3072.000
1536.000
768.000
307.20000
5
3072.000
1536.000
768.000
614.40000
Copyright © 2008–2009, Texas Instruments Incorporated
APPENDIX A – Frequency Ranges Supported
83
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