TLK3131_15 Datasheet, PDF (82/102 Pages) Texas Instruments – Single Channel Multi-Rate Transceiver

TLK3131
SLLS957A – DECEMBER 2008 – REVISED DECEMBER 2009
www.ti.com
A APPENDIX A – Frequency Ranges Supported
The following tables show the details of REFCLK input frequency versus Jitter Cleaner PLL multiplier
value for each application TLK3131 supports.
If the desired serial bit rate is between 2.0 Gbps and 3.75 Gbps, full rate should be selected for the
RATE[1:0] bits for that channel.
If the desired serial bit rate is between 1.0 Gbps and 2.125 Gbps, half rate should be selected for the
RATE[1:0] bits for that channel.
If the desired serial bit rate is between 600 Mbps and 1.0625 Gbps, quarter rate should be selected for the
RATE[1:0] bits for that channel.
If the desired serial bit rate falls in the overlap between the full and half rate ranges defined above, then
either setting is appropriate.
If the desired serial bit rate falls in the overlap between the half and quarter rate ranges defined above,
then either setting is appropriate.
In general, there are many different settings that will yield the same serial bit rate. It should be noted that
selecting the setting with the highest SERDES REFCLK and the lowest SERDES PLL Multiplier will give
the best serial performance.
Table A-1. Reference Clock Selection – Gigabit Ethernet Mode
TLK3131 REFLK Jitter Cleaner
Input (MHz)
Multiplier
62.50000
62.50000
62.50000
62.50000
62.50000
125.00000
125.00000
125.00000
125.00000
125.00000
250.00000
250.00000
250.00000
250.00000
250.00000
OFF
0.25
0.5
1
2
OFF
0.25
0.5
1
2
OFF
0.25
0.5
1
2
Gigabit Ethernet Mode - Legal Clocking Mode Settings
SERDES
REFCLK Input
(MHz)
SERDES PLL
Multiplier
Serial Data Rate = f(SPEED[1:0]) (Mbps)
Full (00)
Half (01)
Qrtr. (10)
62.50000
20
2500.000
1250.000
625.000
15.62500
31.25000
62.50000
20
2500.000
1250.000
625.000
125.00000
10
2500.000
1250.000
625.000
125.00000
10
2500.000
1250.000
625.000
31.25000
62.50000
20
2500.000
1250.000
625.000
125.00000
10
2500.000
1250.000
625.000
250.00000
5
2500.000
1250.000
625.000
250.00000
5
2500.000
1250.000
625.000
62.50000
20
2500.000
1250.000
625.000
125.00000
10
2500.000
1250.000
625.000
250.00000
5
2500.000
1250.000
625.000
500.00000
82
APPENDIX A – Frequency Ranges Supported
Copyright © 2008–2009, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): TLK3131