TLK3131_15 Datasheet, PDF (25/102 Pages) Texas Instruments – Single Channel Multi-Rate Transceiver

TLK3131
www.ti.com
SLLS957A – DECEMBER 2008 – REVISED DECEMBER 2009
2.7.9 TBID Mode (Ten Bit Interface DDR)
Table 2-11. TBID – Lane To Functional Pin Mapping
DATA CHANNEL
NUMBER
Channel 0
TRANSMIT DATA 10 BITS
(INPUT)
RECEIVE DATA 10 BITS
(OUTPUT)
{TXC_[4], TXC_[0],TXD_[7:0]} {RXC_[4], RXC_[0],RXD_[7:0]}
TRANSMIT CLOCK
(INPUT)
TXCLK_[0]
RECEIVE CLOCK
(OUTPUT)
RXCLK_ [0]
TXCLK_[0]
TXC_[4], TXC_[0],
TXD_[7:0]
DDR Source Centered Timing
Data0[9:0]
Data1[9:0]
RXCLK_[0]
RXC_[4], RXC_[0],
RXD_[7:0]
TXCLK_[0]
TXC_[4], TXC_[0],
TXD_[7:0]
Data0[9:0]
Data1[9:0]
DDR Source Aligned Timing
Data0[9:0]
Data1[9:0]
RXCLK_[0]
RXC_[4], RXC_[0],
RXD_[7:0]
Data0[9:0]
Data1[9:0]
Figure 2-15. TBID – Individual Channel Byte Ordering – Channel 0 Example
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