TLK3131_15 Datasheet, PDF (51/102 Pages) Texas Instruments – Single Channel Multi-Rate Transceiver

TLK3131
www.ti.com
SLLS957A – DECEMBER 2008 – REVISED DECEMBER 2009
Table 2-81. DLL Offset Control
VALUE
000
001
010
011
100
101
110
111
OFFSET[2:0]
RESULT
No delay elements are added
1 extra delay element is added
2 extra delay elements are added
3 extra delay elements are added
No delay elements are removed
1 extra delay element is removed
2 extra delay elements are removed
3 extra delay elements are removed
BIT(s)
37896.5:0
Table 2-82. TX0_DLL_STATUS
ADDRESS: 0x9408
NAME
Delay_status[5:0]
For TI use only.
DEFAULT: 0x0000
DESCRIPTION
ACCESS
RO
BIT(s)
37897.5:0
Table 2-83. TX1_DLL_STATUS
ADDRESS: 0x9409
NAME
Reserved
Reserved
DEFAULT: 0x0000
DESCRIPTION
ACCESS
RO
BIT(s)
37900.5:0
Table 2-84. RX0_DLL_STATUS
ADDRESS: 0x940C
NAME
Delay_status[5:0]
For TI use only.
DEFAULT: 0x0000
DESCRIPTION
ACCESS
RO
BIT(s)
37901.5:0
Table 2-85. RX1_DLL_STATUS
ADDRESS: 0x940D
NAME
Reserved
Reserved
DEFAULT: 0x0000
DESCRIPTION
ACCESS
RO
BIT(s)
38144.7:0
Table 2-86. CH0_TESTFAIL_ERR_COUNTER
ADDRESS: 0x9500
NAME
Ch0_Testfail error
counter[7:0]
DEFAULT: 0x00FD
DESCRIPTION
This counter reflects error count during PRBS test. Counter increments
for each received character that has an error. Counter clears upon read.
Counter value is valid only when SERDES RX test pattern verification bits
are set.
ACCESS
COR
BIT(s)
38145.7:0
Table 2-87. CH1_TESTFAIL_ERR_COUNTER
ADDRESS: 0x9501
NAME
Reserved
Reserved
DEFAULT: 0x00FD
DESCRIPTION
ACCESS
COR
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