TLK3131_15 Datasheet, PDF (67/102 Pages) Texas Instruments – Single Channel Multi-Rate Transceiver

TLK3131
www.ti.com
SLLS957A – DECEMBER 2008 – REVISED DECEMBER 2009
4.3 REFERENCE CLOCK TIMING REQUIREMENTS (REFCLKP/N)^{(1) (2)}
PARAMETER
Frequency
Accuracy
Accuracy to TXCLK
Duty Cycle
Jitter
Minimum data rate
1G PCS Mode
All
CONDITION
Random and deterministic
(1) This clock should be crystal referenced to meet the requirements of the above table
(2) Contact TI for specific clocking recommendations
MIN
60
–100
0
45%
NOM
–
0
50%
MAX
375
100
0
55%
40
UNIT
MHz
ppm
ppm
ps
4.4 REFERENCE CLOCK ELECTRICAL CHARACTERISTICS (REFCLKP/N)
PARAMETER
V_id
Differential Input Voltage
C_IN
Input Capacitance
R_IN
Input Differential Impedance
t_rise
Rise Time
20% to 80%
CONDITION
MIN NOM
100
80 100
50
MAX
2000
3
120
600
UNIT
mV_PP
pF
Ω
ps
4.5 SINGLE ENDED REFERENCE CLOCK ELECTRICAL CHARACTERISTICS (REFCLK)
PARAMETER
V_IH High-Level Input Voltage
V_IL
I_IH/I_IL
t_rise
Jitter
Tcyc
Low-Level Input Voltage
High/Low Input Current
Rise Time
Peak to Peak Jitter
Duty Cycle
CONDITION
20% → 80%
Jitter Cleaner not used on REFCLK
MIN NOM
1.7
–0.3
40% 50%
MAX
VDDO +
0.3
0.7
±10
1
40
60%
UNIT
V
V
μA
ns
ps
Period
4.6 JITTER CLEANER TIMING PARAMETERS
PARAMETER
PLL Bandwidth
Jitter Peaking
VCO Output Jitter (rms)
VCO Output Jitter (rms)
VCO Output Jitter (rms)
VCO Output Jitter (rms)
–3dB
2 MHz → 30 MHz
1.2 MHz → 30 MHz
600 kHz → 30 MHz
300 kHz → 30 MHz
CONDITION
4.7
V_OH
V_OL
V_IH
LVCMOS ELECTRICAL CHARACTERISTICS
PARAMETER
High-level output voltage
Low-level output voltage
High-level input voltage
CONDITION
I_OH = –100 μA, Driver Enabled
I_OL = 100 μA, Driver Enabled
V_IL
I_IH, I_IL
I_OZ
C_IN
Low-level input voltage
Receiver Only Low/High Input Current
Driver Only
Driver/Receiver With Pullup/Pulldown
Input capacitance
Driver Disabled
Driver Disabled With Pull Up/Down Enabled
MIN NOM MAX
1
0.1
2
2.5
4
8
UNIT
MHz
dB
ps
ps
ps
ps
MIN NOM
MAX UNIT
2.1
VDDO V
0
0.2 V
1.7
VDDO + V
0.3
–0.3
0.7 V
±10 μA
±35 μA
±100 μA
5 pF
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