TLK3131_15 Datasheet, PDF (50/102 Pages) Texas Instruments – Single Channel Multi-Rate Transceiver

TLK3131
SLLS957A – DECEMBER 2008 – REVISED DECEMBER 2009
Table 2-77. TX0_DLL_CONTROL
BIT(s)
37888.15
37888.14
37888.13:8
37888.7:5
37888.3
ADDRESS: 0x9400
NAME
Lock_en
Write_en
Delay_sel[5:0]
Offset[2:0]
Filter_en
DEFAULT: 0x0008
DESCRIPTION
For TI use only
For TI use only
DLL delay control. For TI use only
Phase shift control. Adds or removes delay element. Each delay element
is 0.15ns. Refer Table 2-81: DLL Offset Control
When asserted, the internal filter is used to reduce the cycle to cycle jitter
of the output clock.
www.ti.com
ACCESS
RW
Table 2-78. TX1_DLL_CONTROL
BIT(s)
37889.15:5, 3
ADDRESS: 0x9401
NAME
Reserved
Reserved
DEFAULT: 0x0008
DESCRIPTION
ACCESS
RW
Table 2-79. RX0_DLL_CONTROL
BIT(s)
37892.15
37892.14
37892.13:8
37892.7:5
37892.3
ADDRESS: 0x9404
NAME
Lock_en
Write_en
Delay_sel[5:0]
Offset[2:0]
Filter_en
DEFAULT: 0x0008
DESCRIPTION
For TI use only
For TI use only
DLL delay control. For TI use only
Phase shift control. Adds or removes delay element. Each delay element
is 0.15 ns. Refer Table 2-81: DLL Offset Control
When asserted, the internal filter is used to reduce the cycle to cycle jitter
of the output clock.
ACCESS
RW
Table 2-80. RX1_DLL_CONTROL
BIT(s)
37893.15:5, 3
ADDRESS: 0x9405
NAME
Reserved
Reserved
DEFAULT: 0x0008
DESCRIPTION
ACCESS
RW
50
Detailed Description
Submit Documentation Feedback
Product Folder Link(s): TLK3131
Copyright © 2008–2009, Texas Instruments Incorporated