LM3S5R36_13 Datasheet, PDF (978/1063 Pages) Texas Instruments – LM3S5R36 Microcontroller

Signal Tables
NRND: Not recommended for new designs.
Table 22-2. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
PB1
I/O
TTL
GPIO port B bit 1. This pin is not 5-V tolerant.
CCP1
I/O
TTL
Capture/Compare/PWM 1.
42
CCP2
I/O
TTL
Capture/Compare/PWM 2.
PWM3
O
TTL
PWM 3. This signal is controlled by PWM Generator 1.
U1Tx
O
TTL
UART module 1 transmit. When in IrDA mode, this signal has IrDA
modulation.
43
VDD
-
Power Positive supply for I/O and some logic.
44
GND
-
Power Ground reference for logic and I/O pins.
45
USB0DM
I/O
Analog Bidirectional differential data pin (D- per USB specification) for
USB0.
46
USB0DP
I/O
Analog Bidirectional differential data pin (D+ per USB specification) for
USB0.
PB2
I/O
TTL
GPIO port B bit 2.
CCP0
I/O
TTL
Capture/Compare/PWM 0.
47
CCP3
I/O
TTL
Capture/Compare/PWM 3.
I2C0SCL
I/O
OD
I²C module 0 clock.
IDX0
I
TTL
QEI module 0 index.
48
USB0RBIAS
O
Analog 9.1-kΩ resistor (1% precision) used internally for USB analog
circuitry.
PC3
I/O
TTL
GPIO port C bit 3.
49
SWO
O
TTL
JTAG TDO and SWO.
TDO
O
TTL
JTAG TDO and SWO.
PC2
I/O
TTL
GPIO port C bit 2.
50
TDI
I
TTL
JTAG TDI.
PC1
I/O
TTL
GPIO port C bit 1.
51
SWDIO
I/O
TTL
JTAG TMS and SWDIO.
TMS
I
TTL
JTAG TMS and SWDIO.
PC0
I/O
TTL
GPIO port C bit 0.
52
SWCLK
I
TTL
JTAG/SWD CLK.
TCK
I
TTL
JTAG/SWD CLK.
53
GND
-
Power Ground reference for logic and I/O pins.
VDDC
54
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals. The voltage on this pin is
1.3 V and is supplied by the on-chip LDO. The VDDC pins should
only be connected to the LDO pin and an external capacitor as
specified in .
PB7
I/O
TTL
GPIO port B bit 7.
55
NMI
I
TTL
Non-maskable interrupt.
978
October 06, 2012
Texas Instruments-Production Data