LM3S5R36_13 Datasheet, PDF (13/1063 Pages) Texas Instruments – LM3S5R36 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S5R36 Microcontroller
Figure 18-2. Structure of Comparator Unit .............................................................................. 864
Figure 18-3. Comparator Internal Reference Structure ............................................................ 864
Figure 19-1. PWM Module Diagram ....................................................................................... 876
Figure 19-2. PWM Generator Block Diagram .......................................................................... 876
Figure 19-3. PWM Count-Down Mode .................................................................................... 879
Figure 19-4. PWM Count-Up/Down Mode .............................................................................. 879
Figure 19-5. PWM Generation Example In Count-Up/Down Mode ........................................... 880
Figure 19-6. PWM Dead-Band Generator ............................................................................... 880
Figure 20-1. QEI Block Diagram ............................................................................................ 951
Figure 20-2. Quadrature Encoder and Velocity Predivider Operation ........................................ 953
Figure 21-1. 64-Pin LQFP Package Pin Diagram .................................................................... 972
Figure 24-1. Load Conditions ................................................................................................ 998
Figure 24-2. JTAG Test Clock Input Timing ............................................................................. 999
Figure 24-3. JTAG Test Access Port (TAP) Timing .................................................................. 999
Figure 24-4. Power-On Reset Timing ................................................................................... 1000
Figure 24-5. Brown-Out Reset Timing .................................................................................. 1000
Figure 24-6. Power-On Reset and Voltage Parameters ......................................................... 1001
Figure 24-7. External Reset Timing (RST) ............................................................................ 1001
Figure 24-8. Software Reset Timing ..................................................................................... 1001
Figure 24-9. Watchdog Reset Timing ................................................................................... 1002
Figure 24-10. MOSC Failure Reset Timing ............................................................................. 1002
Figure 24-11. Hibernation Module Timing with Internal Oscillator Running in Hibernation .......... 1007
Figure 24-12. Hibernation Module Timing with Internal Oscillator Stopped in Hibernation .......... 1007
Figure 24-13. ADC Input Equivalency Diagram ....................................................................... 1009
Figure 24-14. SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing
Measurement .................................................................................................. 1010
Figure 24-15. SSI Timing for MICROWIRE Frame Format (FRF=10), Single Transfer ............... 1010
Figure 24-16. SSI Timing for SPI Frame Format (FRF=00), with SPH=1 ................................... 1011
Figure 24-17. I²C Timing ....................................................................................................... 1012
Figure C-1. Stellaris LM3S5R36 64-Pin LQFP Package ....................................................... 1058
Figure C-2. 64-Pin LQFP Tray Dimensions .......................................................................... 1060
Figure C-3. 64-Pin LQFP Tape and Reel Dimensions ........................................................... 1061
October 06, 2012
13
Texas Instruments-Production Data